As network systems gradually become more complex and intelligent, the end product from the system hardware to its software is pursuing a unique difference, and this trend has driven the industry toward standard hardware protocols and interconnections. This article will discuss the basics that affect these communication protocols and interconnections, and details the communication protocols of the serial switching market - PCI Express and Advanced Switching (AS) interconnections.
Backplane interconnection characteristics
The backplane is an interconnect device located within the rack. It may or may not have intelligence capabilities, and typically it may have various cards and circuit boards plugged into the slots. Passive backplane circuits may require the use of resistors, processors, or some control driver circuitry. In the past, backplane interconnects have been additional physical ports such as plugs, sockets, or wireless ports such as transmitters, receivers, and the like. In most cases, one or two slots are reserved for the switch card as the infrastructure and logical layers of the backplane.
The backplane communication protocol in a typical 19-inch rack requires flame-retardant insulation (FR4) between the boards, two connectors (having an approximate length of 40 inches of wiring), and an integrated 2-40 Gbps line card. At such speeds, serial transmission is the only viable method. In addition, a decoding mechanism is needed to solve the problems of packet and cell transmission and in-band control. The system's integration capability will determine the number of backplane lines and the required data transmission speed for each line. The backplane logically contains a switch fabric for each level of interconnection. The system capacity here is the sum of the line card speeds and is directly related to the efficiency of the switch matrix. The efficiency of the switching matrix is ​​determined by the number and speed of the first-level ports. In addition, data integrity, thermal-induced bit-error-rate rebound, error monitoring, and recovery issues must also be considered.
When choosing the backplane interconnection protocol, careful consideration must be given to the design criteria of the system. The challenge of the entire data transmission service is how to solve the problem of data sharing and movement among the units in a processing system, that is, the backplane interconnection and other units must be matched with each other. In the multiprocessor case, data must be transferred as seamlessly as possible between applications, tasks, or registers. In addition, network traffic is best transmitted in the form of data streams. In an efficient computing area or similar multiprocessor system, the degree of abstraction between CPU domains or CPUs and accessed remote elements must also be considered. If direct register access is required, an information-based or network-based protocol that accomplishes this access transfer is needed, although this will increase the load. With the transmission of network data, the characteristics of data transmission can be consistent with the communication protocol directly applied to the above.
Network service quality (QoS) is an important feature of backplane interconnection. The main connotation of QoS is the satisfaction of traffic delay and signal jitter of the highest priority level in case of full congestion.
Network Architecture
Switch or router architectures that are close to the core of the network typically require higher line speeds and require more redundant cells and stronger distributed processing capabilities. In order to improve performance and QoS, the backplane interconnect technology of switches and routers has long used special communication protocols. The most common data flow transmissions are packet-aware and cell-based algorithms, but The emergence of open interconnection standards such as advanced switching not only provides the same functionality, but also brings benefits of standardized chips.
In short, the tight coupling of processing functions within the system is the key to deciding what kind of backplane interconnect solution to use.
Standard serial exchange
In the past, switching systems had to rely on a wideband parallel bus and a dedicated switching architecture. Now these parallel architectures have begun to be replaced by high-speed serial-connected switches (Figure 1). Although there are still many protocols and algorithms using the patented technology in the switching system or chip, the standard serial switching technology will rapidly grow in the future. The two types of protocols that are currently widely accepted are PCI Express and Advanced Switching.
PCI Express Architecture
The PCI Express architecture is an open standard that meets the needs of a variety of system interconnects for the current and future computing and communications industries. The architecture features flexible, scalable, high-speed, serial, point-to-point, and hot-pluggable interconnects that are compatible with PCI architecture software.
In the computer industry, the PCI Express architecture has a large number of loyal followers. The major IP core vendors, such as FPGA developers, have adopted many PCI Express architecture IP cores in chip design. The major IP certification vendors are also designers. Provides PCI Express architecture certified code and tools, major developers of development tools and test equipment already support PCI Express architecture in products, foundry also uses PCI Express architecture in process, ASIC and FPGA device suppliers are in design Incorporating PCI Express technology, manufacturers of Ethernet, storage and I/O processors, switches, and bridges have also developed components of related architectures. Since chip manufacturers can use the basic products and services of the computer industry to develop products required by the communications industry, PCI Express is also being reused. Major chip vendors supporting PCI Express include Intel and IDT.
Advanced Exchange Standard
Advanced switching standards based on the PCI Express architecture are advanced technologies for board-to-board, board-to-board and board-to-fiber design processor-to-processor and processor-to-I/O device interconnects, and their rapid development has been compromised. IDT and other chip makers attach great importance. The advanced switching standard covers the core of PCI Express technology, adds the function of data processing layer (Transaction-Layer), and helps to flexibly perform protocol packaging, peer-to-peer transmission, dynamic reconfiguration, and multicast. Advanced exchange standards are promoted and supported by the Advanced Interconnection Task Force (ASI-SIG). Participating vendors include Agere Systems, Alcatel, Huawei Technologies, Intel, Siemens Information, Communication Networks, Vitesse, and Xilinx.
With the increase in the degree of integration of computing and communications products, the demand for general-purpose I/O interconnect interfaces has become more and more urgent. However, the industry is also facing tremendous pressure to shorten the time to market and reduce R&D costs. Therefore, manufacturers urgently need to form standard components. To meet the technical requirements of the converged architecture and to launch low-cost products required by the highly competitive communications industry.
To meet the needs of vendors and developers in technology and business, all the technologies needed for emerging interconnect environments are needed, and the advanced switching interconnect architecture not only meets the convergence of the computing environment, but also the design of chip-to-chip connections and communication architectures. Providing excellent efficiency, it is also a multi-point, peer-to-peer exchange interconnection standard that enables any protocol packetization, multiple information transmission mechanisms, including congestion management and extended high availability QoS. The advanced switching and PCI Express architectures use the same physical and data connectivity layers and can directly utilize the vast industrial system in PCI Express.
The standardization of advanced switching architecture brings unlimited business opportunities to the computing and communications industry. Advanced switching provides PCI with transparency, powerful scalability, and flexibility, helping to promote the progress toward AS technology and the development of new systems. Advanced exchange not only allows designers to retain newly developed features, features, and benefits in the process of technology development, but also enables later developers to reuse them to reduce costs. Manufacturers will have more time and resources to invest in product-specific development.
Backplane interconnection characteristics
The backplane is an interconnect device located within the rack. It may or may not have intelligence capabilities, and typically it may have various cards and circuit boards plugged into the slots. Passive backplane circuits may require the use of resistors, processors, or some control driver circuitry. In the past, backplane interconnects have been additional physical ports such as plugs, sockets, or wireless ports such as transmitters, receivers, and the like. In most cases, one or two slots are reserved for the switch card as the infrastructure and logical layers of the backplane.
The backplane communication protocol in a typical 19-inch rack requires flame-retardant insulation (FR4) between the boards, two connectors (having an approximate length of 40 inches of wiring), and an integrated 2-40 Gbps line card. At such speeds, serial transmission is the only viable method. In addition, a decoding mechanism is needed to solve the problems of packet and cell transmission and in-band control. The system's integration capability will determine the number of backplane lines and the required data transmission speed for each line. The backplane logically contains a switch fabric for each level of interconnection. The system capacity here is the sum of the line card speeds and is directly related to the efficiency of the switch matrix. The efficiency of the switching matrix is ​​determined by the number and speed of the first-level ports. In addition, data integrity, thermal-induced bit-error-rate rebound, error monitoring, and recovery issues must also be considered.
When choosing the backplane interconnection protocol, careful consideration must be given to the design criteria of the system. The challenge of the entire data transmission service is how to solve the problem of data sharing and movement among the units in a processing system, that is, the backplane interconnection and other units must be matched with each other. In the multiprocessor case, data must be transferred as seamlessly as possible between applications, tasks, or registers. In addition, network traffic is best transmitted in the form of data streams. In an efficient computing area or similar multiprocessor system, the degree of abstraction between CPU domains or CPUs and accessed remote elements must also be considered. If direct register access is required, an information-based or network-based protocol that accomplishes this access transfer is needed, although this will increase the load. With the transmission of network data, the characteristics of data transmission can be consistent with the communication protocol directly applied to the above.
Network service quality (QoS) is an important feature of backplane interconnection. The main connotation of QoS is the satisfaction of traffic delay and signal jitter of the highest priority level in case of full congestion.
Network Architecture
Switch or router architectures that are close to the core of the network typically require higher line speeds and require more redundant cells and stronger distributed processing capabilities. In order to improve performance and QoS, the backplane interconnect technology of switches and routers has long used special communication protocols. The most common data flow transmissions are packet-aware and cell-based algorithms, but The emergence of open interconnection standards such as advanced switching not only provides the same functionality, but also brings benefits of standardized chips.
In short, the tight coupling of processing functions within the system is the key to deciding what kind of backplane interconnect solution to use.
Standard serial exchange
In the past, switching systems had to rely on a wideband parallel bus and a dedicated switching architecture. Now these parallel architectures have begun to be replaced by high-speed serial-connected switches (Figure 1). Although there are still many protocols and algorithms using the patented technology in the switching system or chip, the standard serial switching technology will rapidly grow in the future. The two types of protocols that are currently widely accepted are PCI Express and Advanced Switching.
PCI Express Architecture
The PCI Express architecture is an open standard that meets the needs of a variety of system interconnects for the current and future computing and communications industries. The architecture features flexible, scalable, high-speed, serial, point-to-point, and hot-pluggable interconnects that are compatible with PCI architecture software.
In the computer industry, the PCI Express architecture has a large number of loyal followers. The major IP core vendors, such as FPGA developers, have adopted many PCI Express architecture IP cores in chip design. The major IP certification vendors are also designers. Provides PCI Express architecture certified code and tools, major developers of development tools and test equipment already support PCI Express architecture in products, foundry also uses PCI Express architecture in process, ASIC and FPGA device suppliers are in design Incorporating PCI Express technology, manufacturers of Ethernet, storage and I/O processors, switches, and bridges have also developed components of related architectures. Since chip manufacturers can use the basic products and services of the computer industry to develop products required by the communications industry, PCI Express is also being reused. Major chip vendors supporting PCI Express include Intel and IDT.
Advanced Exchange Standard
Advanced switching standards based on the PCI Express architecture are advanced technologies for board-to-board, board-to-board and board-to-fiber design processor-to-processor and processor-to-I/O device interconnects, and their rapid development has been compromised. IDT and other chip makers attach great importance. The advanced switching standard covers the core of PCI Express technology, adds the function of data processing layer (Transaction-Layer), and helps to flexibly perform protocol packaging, peer-to-peer transmission, dynamic reconfiguration, and multicast. Advanced exchange standards are promoted and supported by the Advanced Interconnection Task Force (ASI-SIG). Participating vendors include Agere Systems, Alcatel, Huawei Technologies, Intel, Siemens Information, Communication Networks, Vitesse, and Xilinx.
With the increase in the degree of integration of computing and communications products, the demand for general-purpose I/O interconnect interfaces has become more and more urgent. However, the industry is also facing tremendous pressure to shorten the time to market and reduce R&D costs. Therefore, manufacturers urgently need to form standard components. To meet the technical requirements of the converged architecture and to launch low-cost products required by the highly competitive communications industry.
To meet the needs of vendors and developers in technology and business, all the technologies needed for emerging interconnect environments are needed, and the advanced switching interconnect architecture not only meets the convergence of the computing environment, but also the design of chip-to-chip connections and communication architectures. Providing excellent efficiency, it is also a multi-point, peer-to-peer exchange interconnection standard that enables any protocol packetization, multiple information transmission mechanisms, including congestion management and extended high availability QoS. The advanced switching and PCI Express architectures use the same physical and data connectivity layers and can directly utilize the vast industrial system in PCI Express.
The standardization of advanced switching architecture brings unlimited business opportunities to the computing and communications industry. Advanced switching provides PCI with transparency, powerful scalability, and flexibility, helping to promote the progress toward AS technology and the development of new systems. Advanced exchange not only allows designers to retain newly developed features, features, and benefits in the process of technology development, but also enables later developers to reuse them to reduce costs. Manufacturers will have more time and resources to invest in product-specific development.
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